collective memory, backed by memory.

the first memory layer quoted in memory silicon. every unit of cmem is priced against — and physically routed through — tokenized shares of the company that manufactures forgetting's only cure.

a number with a date is measured. a number without a date is doctrine. this page contains both, and labels them.

station 01 · the refresh cycle

everything that remembers is a leaky capacitor

a dram cell holds one bit as charge. left alone, the charge leaks and the bit is gone in about 64 milliseconds — the retention window JEDEC writes into the DDR standard — so the controller re-reads and re-writes every row, forever. this is called refresh. it is not an optimization; it is the entire reason your computer remembers anything.

a market holds attention the same way. we measured one launch, 2026-08-20: 201 buyers decayed to 8 holders across 38 minutes — a half-life of t½ ≈ 8.2 minutes. the window is the whole proof; without it the ratio says nothing. charge leaks. rehearsal restores. the substrate differs; the physics does not.

dram array · 1 transistor 1 capacitor per cellintegrity —

cells leak continuously. the amber sweep is the refresh controller; your cursor is a manual one. stop both, and the array forgets itself — which is also the doctrine.

silicon forgets in64 ms without refresh

markets forget in8.2 min measured 2026-08-20

cmem isthe refresh controller pointed at attention

station 02 · the silicon reserve

a reserve that cannot be spent, only refreshed

cmem launches in a pair against MU.RH — tokenized micron — on an oracle-priced curve. the consequence is structural, not decorative: every net buy of cmem buys memory silicon and locks it inside the pair as the other side of the trade. the creator position is locked; there is no treasury key.

quote assetMU.RH — a debt token tracking micron, priced by chainlink oracle, minted only by authorized market makers against real shares. live on the chain today at $920 a share, $6.85M traded in 24h against a $501K pool — read 2026-09-02, and checkable: the pair

on each buythe route passes through the MU pool; micron exposure accumulates in the locked pair — the reserve deepens by trading, not by decree

on each feefees rehearse the reserve: periodic buyback into the pair, the way a controller re-writes a fading row. a fee cycle is a refresh cycle

off-hourswhen the real market sleeps, minting halts and the silicon trades at a phantom premium. memory is dearest when no one can manufacture it — the chart will teach this every weekend

station 03 · why micron

compute is not the scarce half of intelligence

the chain already worships compute — its largest token is a dog quoted in nvidia. we decline the crowded altar. compute can recompute whatever it forgets; memory is the part that cannot be recomputed. every model you have ever spoken to keeps its weights on nand until they are loaded, and holds every token of your context in dram while it answers — both are silicon micron ships by the exabyte.

so the reserve holds the manufacturer of remembering, not the manufacturer of thinking. when the ai cycle turns, thinking gets cheaper every quarter — and remembering gets more expensive. doctrine, not audit; the dated numbers arrive with the live reserve page.

station 04 · disclosures

the honest ledger

cmem promises no software, no yield, no roadmap. the reference architecture describes how memory already works. the pair mechanics above are the launchpad's, not ours — we chose them because they cannot be un-chosen. everything on this page runs locally; we are a memory layer, not a surveillance layer.

CA · TO BE ANNOUNCEDreserve telemetry and pair address go live when the token does